简介:A0.18lmCMOSlownoiseamplifier(LNA)byutilizingnoise-cancelingtechniquewasdesignedandimplementedinthispaper.Current-reuseandself-biastechniqueswereusedinthefirststagetoachieveinputmatchingandreducepowerconsumption.ThecoresizeoftheproposedCMOSLNAcircuitwithoutinductorwasonly128lm9226lm.ThemeasuredpowergainandnoisefigureoftheproposedLNAwere20.6and1.9dB,respectively.The3-dBbandwidthcoversfrequencyfrom0.1to1.2GHz.Whenthechipwasoperatedatasupplyvoltageof1.8V,itconsumed25.69mW.ThehighperformanceoftheproposedLNAmakesitsuitableformultistandardlow-costreceiverfront-endswithintheabovefrequencyrange.
简介:设计并实现了一个应用于ZigBee收发机的全集成整数N频率综合器.频率综合器中采用了稳定环路带宽技术,使频率综合器的环路带宽在压控振荡器(VCO)的整个输出频率范围内恒定不变,从而维持了频率综合器的相位噪声最优值与环路稳定性.频率综合器的同相与正交信号(IQ)由VCO输出端的除2分频器产生.该频率综合器采用0.18μmRFCMOS工艺技术制造,芯片面积约1.7mm2.频率综合器采用在晶圆测试的方式进行了测试.在1.8V电源电压下,频率综合器不包括输出缓冲所消耗的总功率为28.8mW.频率综合器在2.405GHz载波1及3MHz频偏处测得相位噪声分别为-110和-122dBc/Hz.频率综合器在2MHz频偏处测得的参考杂散为-48.2dBc.测得的建立时间约为160μs.